1. Field of the Invention
The present invention relates to apparatus and method for forming a polycrystalline silicon thin film from an amorphous silicon, using a metal.
2. Description of the Related Art
Polycrystalline silicon (hereinafter referred to as polysilicon) thin film employed in a technical field of the present invention is mainly used in a liquid crystal display (LCD), an organic electroluminescent (EL), or the like.
For example, since the LCD does not have a self-luminescent property unlike the cathode ray tube (CRT), it needs a backlight but is widely used as one of flat panel displays due to advantages, such as a low power consumption, a portable lightweight and slim profile and the like.
The LCD uses a color filter to display colors. A unit pixel of the color filter is comprised of R, G and B sub-pixels. The LCD employs a matrix control way to display colors through these respective pixels.
In such LCDs, an active matrix type LCD uses three transistors capable of processing R, G and B signals every pixel to obtain a definite color, and a thin film transistor (TFT) LCD is a representative of the active matrix type LCDS.
Owing to the aforementioned reasons, a process of manufacturing LCDs is included in the same category as a semiconductor device manufacturing process. For example, to form an indium tin oxide (ITO) thin film and an ITO electrode pattern on a surface of an LCD substrate, a photolithography technique is used like in the semiconductor device manufacturing process.
However, the LCD manufacturing process has a difference than the semiconductor device manufacturing process in that it uses a glass as a substrate instead of a wafer used in the semiconductor manufacturing process.
In more detail, a deposition of a silicon film on a substrate using a thermal decomposition of silane gas (SiH4) requires a high temperature of approximately 600° C. However, when the glass substrate is exposed to a thermal environment for a long time, for example, to a temperature of 450-500° C., the glass substrate is deformed. Therefore, the deposition process of the semiconductor device manufacturing process cannot be directly applied to the LCD manufacturing process.
Thus, a plasma enhanced chemical vapor deposition (PECVD) is generally used in the LCD manufacturing process. Since the PECVD makes it possible to deposit a silicon thin film at a temperature within 350° C., it is possible to use the glass substrate.
However, the aforementioned PECVD has a limitation in that the silicon thin film formed is an amorphous silicon thin film. In the active matrix control way, each pixel is driven by an amorphous TFT, and a driving circuit is separately prepared by a circuit formed on a single crystalline silicon.
In other words, since the amorphous silicon has a low electron mobility, it cannot be used in a circuit operating at a high speed. In an LCD using an amorphous silicon TFT, it is necessary to electrically connect a PCB with an LCD panel using a tape carrier package (TCP) on which a driving IC is mounted.
The above-exemplified LCD increases a cost of the driving IC itself and its mounting cost. Also, a connection part between the TCP and the PCB and a connection part between the TCP and the LCD panel are weak to a mechanical and thermal impact and have a high contact resistance. Further, since an increase in resolution of the LCD panel requires a further decrease in pitch between pads for signal lines and scanning lines, it is difficult to perform a TCP bonding.
Resultantly, in view of trends toward a large-sized screen and a high picture quality of a flat panel display, the amorphous silicon TFT has a limitation in satisfying these requirements due to a low speed and a large volume.
So, a subject matter that must be solved is a conversion of the amorphous silicon to a crystal silicon, and is generally performed by a solid phase crystallization (SPC), an excimer laser crystallization (ELC), a metal-induced crystallization (MIC), a metal-induced lateral crystallization (MILC) and the like.
Among the above crystallization methods, the MIC and MILC methods are in the limelight in terms of productivity and large-sized screen. In the MIC and MILC methods, after a specific metal layer is deposited on or a specific metal is added to an amorphous silicon layer, the resultant amorphous silicon layer is thermally treated such that is crystallized even at a low temperature which does not damage the glass substrate.
The MIC method lowers the crystallization temperature of the amorphous silicon by contacting a specific kind of metal with the amorphous silicon. For example, Ni-induced crystallization is accelerated by NiSi2 that serves as a crystallization nucleus and a last phase of a nickel silicide.
In real circumstance, NiSi2 has a similar structure to silicon and has a lattice constant of 5.406 Å which is similar to a lattice constant of silicon, 5.430 Å, and it serves as the crystallization nucleus for the amorphous silicon to accelerate the crystallization.
The crystallization of the amorphous silicon is accelerated by N2, H3, Ar, or H2 plasma since metal atoms are deposited on the amorphous silicon thin film by the N2, H3, Ar, or H2 plasma to generate an MIC.
Herein, the MIC represents that a plurality of metal silicide nuclei are formed on a surface of the amorphous silicon thin film due to a high density of metal particles and thus the crystallization of the amorphous silicon proceeds to an inside of the amorphous silicon thin film. The MILC represents that the crystallization of the amorphous silicon proceeds to a lateral portion of the amorphous silicon thin film due to a low density of metal silicide nuclei.
Meanwhile, in order to distribute those metal nuclei (i.e., crystallization nuclei) on the amorphous silicon thin film, a sputtering is generally performed, in which a nickel panel serving as a target is disposed in a process space and a plasma is formed between the nickel panel and the substrate to adsorb nickel particles decomposed from the nickel target on the substrate.
However, in the distribution of the metal nuclei, the nickel target has a problem in that it is not suitable for a large-sized substrate.
In other words, in the sputtering, argon (Ar) gas is introduced into the process space and nickel particles are adsorbed on the substrate by an electromagnetic field. However, since the nickel is a ferromagnetic material, it is difficult to form a magnetic field in an inside of the process space.
To improve the above problem, a method in which a magnetic filed domain of the nickel target is arranged in a vertical direction to form a magnetic field has been publicly performed. However, the method has a difficulty in preparing the target of which one side is 300 mm long using the present technique level.
Also, it is difficult to distribute a proper metal catalyst for a polycrystallinelization, which is due to an error that a thin film should be formed by a sputtering to perform the MILC process.
That is, the polycrystallinelization can be sufficiently performed by not forming a thin film but by distributing a crystallization nucleus, and a lateral induction is performed from the crystallization nucleus, so that the amorphous silicon is crystallized into the polycrystalline silicon.
At this time, the crystallization nuclei, i.e., metal particles (elements) can be needed to be uniformly distributed on an entire region of the glass substrate. The sputtering for forming a thin film on an entire surface of the glass substrate for this purpose is an excessive process and apparatus in terms of the MILC process for the distribution of the crystallization nuclei. The metal catalyst provided by the sputtering acts as an impurity in the silicon thin film to degrade the property of the crystallized silicon thin film.
In the polycrystalline thin film transistor by the MIC or MILC, it is confirmed that a large amount of metal diffused into the channel region is distributed to cause a serious metal contamination.
In other words, the contamination due to the metal impurity in the channel region has a large influence on the generation of a leakage current to deteriorate the field effect mobility and the threshold voltage characteristic and thus deteriorate the electrical property of the polysilicon thin film transistor.
In the long run, under a circumstance that a high temperature heat treatment is impossible due to the physical property of the glass substrate and a low temperature heat treatment must be inevitably performed, the forming of a metal catalyst layer for performing the low temperature heat treatment is inevitable. However, by doing so, researchers face a dilemma that the supplied catalyst metal acts as a contamination material.
To improve the above drawback, there was a trial in which a separate region surrounding the channel region is formed by an offset to prevent metal material from being penetrated into the channel region (Korean Patent Application No. 10-1998-0003781 entitled “Method of manufacturing thin film transistor”.
However, to dispose the offset region, it is necessary to add a process of separately forming an offset pattern. A decrease in the productivity due to the additional forming of the offset pattern is inevitable, and thus a method that can more basically solve such a problem is required.
Meanwhile, it is a more important and basic problem that it is difficult to adjust the grain size in a preferred size range on the polysilicon thin film. This means that the distribution concentration of metal particles as a catalyst for the adjustment of grain size cannot be adjusted by the sputtering or other thin film forming.
In more detail, FIG. 1 is a concept view showing the size of a lower grain occupied by a gate electrode (channel region) of a TFT having a polysilicon thin film formed by an MLIC. Referring to FIG. 1, the crystallization of the polysilicon is progressed centering on a crystallization nucleus, and a grain boundary is generated at an overlapping portion in a crystallization progress direction performed centering on different nuclei.
At this time, the channel region has a size artificially determined by a design rule. The smaller the grain size is, the more the number of the grain boundary is, and the larger the grain size is, the less the number of the grain boundary is.
Meanwhile, as aforementioned, the polysilicon thin film is used as a semiconductor layer for a TFT that is a pixel driving element of an LCD or an organic EL device. If the properties of the TFTs constituting the respective pixels are different, non-uniform picture quality is caused. Therefore, it is an important factor to maintain the uniformity in picture quality.
Then, when a bond between silicon atoms is not perfect, charge carriers (i.e., electrons/holes) are trapped in the grain boundary to form a potential barrier, which hinders movement of the carriers to deteriorate the characteristic of the TFT.
That is, the potential barrier causes a decrease of the mobility, an increase of Vth or an increase of the leakage current, and the characteristic of the TFT is varied depending on the number and position of the grain boundaries existing in the channel region.
For example, when the grain size is large with respect to the channel region having the same volume and thus the number of the grain boundaries is small, shown in FIG. 1A, the characteristic of the TFT for each channel region is enhanced.
Then, the left channel region has two grain boundaries, whereas the right channel region has five grain boundaries. Thus, a large difference in the number of the grain boundaries in the channel regions of the same layer deteriorates the uniformity wholly.
Meanwhile, when the size of the grains in the channel regions is small and thus the number of the grain boundaries existing in each channel region is proper as shown in FIG. 1b, the characteristic of the TFT for each channel region may be lowered, but the whole uniformity can be secured, which is most preferred in view of the whole characteristic of the TFT.
It is an optimal condition that the channel region has a maximum grain size under a condition that the uniformity is secured. However, the case shown in FIG. 1C secures the uniformity due to a very small grain size, but does not meet the characteristic requirements of the TFT.
In the long run, it is required to properly dispose the grain boundaries in a channel region so as to maintain the uniformity of the channel region. Therefore, it is required to provide a polysilicon thin film having a proper-sized grain boundary for a channel region determined in a designing step.
Under these circumstances, the aforementioned sputtering allows a metal silicide to be formed with an excessive concentration. Therefore, it is extremely natural that the sputtering fails to adjust the grain boundary. In the related art MLIC, the addition of the crystallization nucleus allows a metal layer to be formed rather than allows the crystallization nucleus to be distributed into the amorphous silicon layer, so that it fails to provide means for forming a crystallization nucleus that can adjust the distribution concentration.